Analysis

Nvidia’s fab software push puts three different engineering jobs on GPUs

Atomic simulation, virtual fabrication and inspection need different models and validation. Nvidia’s partnerships show where GPU acceleration fits each task.
Illustrative close-up photograph of a patterned semiconductor wafer

Illustrative image: Unsplash contributor on Unsplash

A calculation about atomic interactions, a model of an etched structure and an inspection image all sit inside semiconductor manufacturing. They do not become the same engineering problem simply because a GPU can accelerate them.

That distinction helps explain Nvidia’s latest semiconductor software partnerships. The work spans the physics used to investigate materials, the geometry produced by manufacturing steps and the image processing used to inspect results. Each has a different route from faster computation to a useful decision.

Nvidia’s cuPotential software addresses atomic-interaction calculations. The company reports improvements of two to three times over workflows that were already GPU optimised in early-access testing. Synopsys is an early adopter of cuPotential alongside other Nvidia computational libraries. [Source 1]

An atomic model can help investigate how materials behave. It does not establish that a complete process sequence will manufacture the intended structure, or that the resulting device will meet its electrical specification. Those remain separate modelling and validation tasks.

The virtual wafer has a different job

Lam Research’s SEMulator3D starts with a design and a process sequence to build a three-dimensional representation of the manufactured structure. Its value comes from examining what successive steps do to that geometry before committing every experiment to silicon.

Lam plans to integrate Nvidia’s NanoVDB technology into selected wafer-etch modelling workflows, targeting availability by the end of 2026. Nvidia reports acceleration of up to 30 times for the selected modelling work. That figure describes a particular computation, rather than a 30-fold reduction in the time required to develop or qualify an entire semiconductor process. [Source 1]

Faster simulation creates room to investigate more combinations of layout and process conditions. Whether the extra runs improve a decision depends on the model’s calibration and the question being asked. Lam’s own discussion of large-area analysis describes using virtual fabrication and metrology to identify problematic structures, with calibration needed to maintain useful agreement with physical processes. [Source 2]

Read the baseline before the multiplier

Inspection adds a third workload. Nvidia reports a 50-fold improvement for a normalised cross-correlation kernel used by KLA against an older CPU implementation. Its performance was comparable with an existing, hand-tuned GPU implementation.

That comparison is more informative than the multiplier alone. It suggests a route to obtaining specialised GPU performance through a supported library, rather than evidence of another 50-fold gain over KLA’s best existing implementation. [Source 1]

The practical attraction is reduced computational effort across several distinct jobs: exploring material behaviour, predicting manufactured geometry and processing inspection data. The engineering work still lies in connecting each result to something measurable on the wafer. A simulation can return sooner while the experiment needed to validate it remains exactly as demanding.

Continue reading