Lattice and NXP bring joint design support to an i.MX 95 FPGA companion

Lattice Semiconductor and NXP have put joint design support behind a PCIe pairing that connects NXP’s i.MX 95 applications processor to a Certus-NX or CertusPro-NX FPGA. The reference architecture was already documented. The current offering brings Lattice’s design files and tools together with NXP’s host driver and evaluation bundles available through Arrow Electronics.

The division of work is the reason to add the FPGA. It can collect sensor data, bridge protocols and handle I/O with predictable timing, leaving the applications processor to run the main software. Lattice is targeting equipment such as machine vision systems and industrial controllers, where the interface may have to change over the product’s life.

PCIe is the link between the two devices; the deterministic behaviour comes from keeping the timing-sensitive work local to the FPGA. A camera trigger, for example, can be generated in the fabric while completed capture data is passed up to the host. If every trigger has to wait for the application to issue a command over PCIe, the design still depends on the timing of the host software and the link.

Lattice says the package is available for design-in with discrete devices, system-on-module and multi-chip module configurations.

Sources: Lattice and NXP joint announcement; Lattice reference design and Arrow bundle details