FPGA & Digital Design

Senior DSP/FPGA Engineer I

Turn communications algorithms into FPGA hardware for space and airborne systems, using VHDL alongside MATLAB or Python models.

Employer
CesiumAstro
Location
Milton Keynes
Salary
Salary not disclosed
Working arrangement
On-site

The role

The work

Design communications DSP functions such as filters, equalisers and carrier recovery. Build floating- and fixed-point models, simulate channel impairments and implement and test the resulting hardware in VHDL.

What the employer asks for

A BSc and an anticipated four-plus years of postgraduate experience, strong communications theory and DSP knowledge, modelling in MATLAB or Python, and excellent VHDL skills. Wireless standards and laboratory hardware validation experience are useful.

Practical details

Full-time, on-site in Milton Keynes. The advert lists pension contributions, income protection, life insurance and parking, but no salary figure. Security and export-control restrictions may apply.

✓ TEB verified

This vacancy was checked against the original application page on

October 6, 2026
. TEB verified means we checked the vacancy, application link and listed details against the source. It is not an endorsement of the employer. Check the employer’s page for the latest details.