Hardware Validation & Debug Engineer (PCIe/SerDes)
Validate and debug Graphcore AI hardware interfaces, focusing on PCIe, SerDes and Ethernet in Bristol.
The role
The work
Validate and debug high-speed interfaces on Graphcore's AI-computing hardware. The work focuses on SerDes, PCIe Root Complex and Ethernet behaviour, from bring-up and link tuning to investigating faults across silicon, hardware and firmware teams.
Experience
Graphcore asks for hands-on board and subsystem validation using oscilloscopes, BERT, VNA/TDR and PCIe protocol analysis. Candidates should understand PCIe link training, equalisation, interoperability and signal-integrity troubleshooting.
Location and package
The role is based in Bristol. The employer lists flexible working, pension contributions, insurance and other benefits, but gives no numerical salary or closing date. Applicants must have the right to work in the UK; sponsorship is not offered.
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