High-speed design & test
DesignCon 2027
Chip, board and system design, with signal and power integrity at its centre.
High-speed design at chip and board level
DesignCon 2027 is at the Santa Clara Convention Center in California on 2–4 February. It centres on chip, board and system design, including the signal-integrity, power-integrity and measurement questions that shape high-speed hardware. The organiser describes technical paper sessions, tutorials and industry panels alongside the exhibition.
Technical conference and exhibition
The conference runs on all three days, while the expo opens on 3–4 February. Engineers working on interconnects, packaging and fast interfaces should plan around the measurements and modelling relevant to their own designs. Compare supplier demonstrations with your stack-up, channel losses and test constraints. Use the 2027 exhibitor directory; older agenda and keynote links on the organiser’s site may refer to 2026.
Conference and exhibition dates differ
The conference runs 2–4 February 2027, with the exhibition on 3–4 February at Santa Clara Convention Center. Plan supplier meetings for the exhibition days and check which technical sessions your pass includes. For signal and power integrity discussions, bring channel, stack-up, power distribution and measurement context.
Event information reviewed 2 November 2026.
Our coverage
See the organiser’s website for registration, opening hours and the current programme.