Staff Verification Engineer
Verify high-speed PCIe and CXL subsystem interfaces within Arm silicon designs in Cambridge.
The role
The work
Work on subsystem-level functional and performance verification for high-speed PCIe and CXL interfaces in Arm-based systems. Collaborate with architects, RTL engineers and verification teams to design test plans, build UVM testbenches and investigate failures.
Experience
The advert focuses on subsystem verification, PCIe/CXL integration, SystemVerilog, UVM and high-speed I/O. Experience reviewing architectures, leading verification work and working across design teams is relevant.
Salary and location
£97,300–£131,700 a year in Cambridge. Arm operates team-dependent hybrid working arrangements. The advert is dated 18 September 2026 and does not specify a closing date.
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