Staff Design Engineer
Develop RTL microarchitectures and integrate IP for Arm compute subsystems targeting edge, physical and cloud AI.
The role
Arm is recruiting a Staff Design Engineer for Cambridge, Manchester, Bristol or Sheffield.
The role develops subsystem microarchitectures, designs RTL in SystemVerilog or Verilog and integrates Arm and third-party IP. It covers UPF and timing constraints, lint, CDC, RDC, X propagation, synthesis and power, performance and area trade-offs.
Arm lists a salary of £97,300 to £131,700 a year and describes a team-defined hybrid working pattern. No closing date is stated.
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