SOC Design Engineer

Develop Arm-based systems on chip, integrating processor clusters, memory interfaces and high-speed connectivity.

The work

Write microarchitecture specifications and RTL, investigate verification failures and support implementation through floorplanning, constraints and timing closure.

Experience

The role calls for Verilog or SystemVerilog, complex IP integration, static design checks, synthesis and timing analysis. Relevant interfaces include PCIe, DDR/LPDDR, HBM, UCIe and Ethernet. Scripting experience is also requested.

Salary and working pattern

£55,300–£74,800 a year. Cambridge is the advertised location. Arm describes team-specific hybrid arrangements, with details discussed during the application process.