Senior Verification Engineer (IP verification)
Verify Arm subsystem IP using SystemVerilog, UVM, formal methods and low-level C or C++ tests.
The role
Arm is recruiting a Senior Verification Engineer in Bristol for subsystem IP verification.
The role verifies crypto accelerators, hardware DVFS components, PCIe controllers and interconnect fabrics. Work includes test planning, SystemVerilog or Verilog testbenches, UVM or formal methods, power-aware verification and embedded C or C++ tests.
Arm lists a salary of £73,500 to £99,500 a year and describes a team-defined hybrid working pattern. No closing date is stated.
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