Senior FPGA Engineer - Systems Team
Configure FPGA systems that connect Riverlane's quantum error-correction hardware to customer quantum computers.
The role
Riverlane is recruiting a Senior FPGA Engineer in Cambridge for its Systems team. The role configures Deltaflow hardware to connect quantum computers with low-latency, high-throughput error-correction systems.
The work includes writing RTL, evaluating customer control and communication requirements, benchmarking latency, troubleshooting integrations and extending verification environments. Experience with modern FPGA platforms, SystemVerilog or VHDL, UVM, Python and C++ is requested.
The role is permanent, full-time and hybrid, with part-time applications also considered. Riverlane lists a salary of £70,000 to £108,000 and says it does not use a closing date.
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